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关于STM32 SPI NSS问题的讨论

对于STM32的SPI,ReferenceManual中是给出的schematic如下:按照标准的SPI协议,当SPI被配置为主机模式后,通过SPI对从设备进行…

关于STM32SPI ,Reference Manual中是给出的schematic如下:

依照规范的SPI协议,当SPI被装备为主机形式后,经过SPI对从设备进行操作时,其NSS应该主动置低,然后选中(使能)从设备;一旦不对从设备进行操作,NSS马上置为高。

可是,我在实践调试过程中却发现:STM32 SPI NSS无法主动完结跳变。 一旦SPI初始化完结并使能SPI,NSS马上置低,然后坚持不变。

这个问题一向无法处理,直到我在ST官方论坛上看到国外有些技术人员也在评论这个问题,他们得出的结论是:STM32 SPI NSS无法主动跳变。

RichardE
Posted 24-07-2009 at 16:07

Registered on :
11-05-2005

From UK (United Kingdom)

Messages :19


OFF-Line

Ive just hit this NSS problem.

What is good:
That the discussion is here on the forum to stop me spending hours trying to work out what I have done wrong. Thanks guys!

What is not good:
That NSS doesnt behave as expected.

What I expected to happen:
Im expecting to see on my scope what I see in Figure 208 of RM008 Reference Manual, i.e. NSS goes high after the transfer.

Why a working NSS would be very helpful:
Im using the SPI (with DMA) to clock data into shift registers. If NSS went high after the transfer (as indicated by Figure 208), I could use that edge as the strobe to latch the data across into the shift register outputs. Everything would be done by the peripheral. Fire and forget. As it is with the broken NSS, I have to generate an interrupt and use that to strobe the gpio output (I hate controlling gpio from within interrupt routines).

Any update as to when this will be fixed?

ST官方技术人员也证明:STM32 SPI NSS是不会主动置位和复位的。依照官方说法,ST现已将其列入了改善方案。

关于这个问题,能够选用下面的办法处理:

在SPI初始化时,选用NSS soft形式,然后使能NSS输出功用。然后将NSS作为GPIO运用,经过软件set和reset来完结NSS的置位和复位。

详细代码如下:

/* SPI1 configuration ——————————————————*/
SPI_InitStructure.SPI_Direction = SPI_Direction_1Line_Tx;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; //
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;//SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI1, &SPI_InitStructure);

/*Enable SPI1.NSS as a GPIO*/
SPI_SSOutputCmd(SPI1, ENABLE);

/*Configure PA.4(NSS)——————————————–*/
GPIO_InitStructure.GPIO_Pin =GPIO_Pin_4;
GPIO_InitStructure.GPIO_Mode=GPIO_Mode_Out_PP;
GPIO_Init(GPIOA, &GPIO_InitStructure);

经过将NSS装备为GPIO,在经过SPI操作从设备时,就能够经过软件来选中和开释从设备了。尽管比起硬件主动置位要费事,但问题究竟处理了。

进一步阅览长达900页的Manual,我发现,文中关于SPI hard形式的描绘并非大多数人所以为的硬件SPI,原文如下:

Slave select (NSS) pin management
There are two NSS modes:
● Software NSS mode: this mode is enabled by setting the SSM bit in the SPI_CR1
register (see Figure 209). In this mode, the external NSS pin is free for other
application uses and the internal NSS signal level is driven by writing to the SSI bit in
the SPI_CR1 register.
● Hardware NSS mode: there are two cases:
– NSS output is enabled: when the STM32F20xxx is operating as a Master and the
NSS output is enabled through the SSOE bit in the SPI_CR2 register, the NSS pin
is driven low and all the NSS pins of devices connected to the Master NSS pin see
a low level and become slaves when they are configured in NSS hardware mode.
When an SPI wants to broadcast a message, it has to pull NSS low to inform all
others that there is now a master for the bus. If it fails to pull NSS low, this means
that there is another master communicating, and a Hard Fault error occurs.
– NSS output is disabled: the multimaster capability is allowed.

当SPI装备为hard形式后,经过检测NSS能够完结的是本身主机和从机形式的切换,而不是大多数人所以为的主动NSS。。。也便是说:在一个多SPI体系中,STM32 SPI经过NSS检测,一旦发现体系中无NSS低信号,自己就输出低,然后成为主机;当体系中有NSS低信号时(及现已有其它SPI宣告为主机),自己就装备为从机。 所谓的hard形式的NSS,实践便是为了完结多机间通讯的。

小结:

断章取义很可怕,Manual要细心研读。

STM32的SPI NSS不论是装备为soft仍是hard都是无法主动置位的,但这却是大多数使用所需求的。正如ST 论坛上RichardE所说:“Everything would be done by the peripheral. Fire and forget.”

,风趣的说法:Fire and forget! ~~~~

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